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[Com Port] testuart2

Description: verilog语言，硬件调试，用于actel刚推出的fusion系列芯片的接口调试-Verilog language, the hardware debugger for Actel recently launched series of fusion-chip debug interface
Platform: | Size: 356352 | Author: yangzhendong | Hits:

[VHDL-FPGA-Verilog] maxII_verilog_i2c

Description: verilog语言在maxII系列芯片上实现iic功能-Verilog language in maxII series chip IIC function
Platform: | Size: 520192 | Author: nedazq | Hits:

[Other] cpld11245

Description: 主要介绍了等精度频率测量原理，该原理具有在整个测试频段内保持高精度频率 测量的优点 同时在该原理基础上，采用了Verilog HDL语言设计了高速的等精度测频 模块，并且利用EDA开发平台QUARTUS11 3 .0对CPLD芯片进行写人，实现了计数等 主要逻辑功能 还使用C语言设计了该等精度频率计的主控程序以提高测量精度。本设 计实现了对频率变化范围较大的信号进行频率测量，能够满足高速度、高精度的测频要 求。-Introduced, such as the accuracy of frequency measurement principle, the principle has in the entire test frequency to maintain the advantages of high precision frequency measurement at the same time the basis of the principle of using the Verilog HDL language, such as the design of a high-speed precision frequency measurement module, and use of EDA Development platform QUARTUS11 3 .0 on CPLD chip to write, and achieved a count of the main logic function, such as the use of C language is also designed such precision the frequency of control procedures to enhance measurement accuracy. This design achieved a wide range of frequency changes in signal frequency measurement, to meet the high-speed, high precision frequency measurement requirements.
Platform: | Size: 320512 | Author: zhengwei | Hits:

[VHDL-FPGA-Verilog] OR1200_verilog

Description: or1200开源risc cpu的verilog描述实现，cpu源代码分析与芯片设计一书的源码-or1200 open source Verilog description of the risc cpu realize, cpu source code analysis and chip design source book
Platform: | Size: 204800 | Author: yu | Hits:

[SCM] rsic

Description: 这是我同学在上海交大实习的时候做的一个单片机的verilog代码实现，希望对大家有帮助-This is my internship students of National Chiao Tung University in Shanghai to do when a single chip verilog code, and they hope to help you
Platform: | Size: 334848 | Author: 陆燕辉 | Hits:

[Other] 1

Description: *先后调试了LED，按键，数码管的verilog程序，并在实验板上面调试成功！学习FPGA是一个漫长的过程，但是我必须得坚持！前途光明，道路崎岖！ 这次在垃圾堆（我工作台下面的抽屉和柜子，呵呵）里面搜索了一个以前用C8051F020作的一个单片机 最小系统，其中有一个PS2的数字小键盘，于是马上鼓捣了一下，复习了一下PS2传输数据的规则，其实还是比较简单的，所以很快就把程序搞定，并在电路板上运行正常！！！ -* Has a debug LED, button, digital control verilog procedures, and debugging in the experiment above board success! FPGA is a long learning process, but I have to insist! A bright future, roads and rugged! In the garbage (I workbench drawers and cabinets below, huh, huh) search inside a previously C8051F020 minimum for a single-chip systems, which have a small number of PS2 keyboard, then immediately鼓捣, then review the PS2 data about the rules, in fact, relatively simple procedures so they get very quickly, and in the normal operation of the circuit board! ! !
Platform: | Size: 5120 | Author: nyw | Hits:

[VHDL-FPGA-Verilog] DW8051_ALL

Description: 包中包括, DW8051完整的Verilog HDL代码 两本手册: DesignWare Library DW8051 MacroCell, Datasheet DesignWare DW8051 MacroCell Databook 三篇51论文: 基于IP 核的PSTN 短消息终端SoC 软硬件协同设计 Embedded TCP/ IP Chip Based on DW8051 Core 以8051为核的SOC中的万年历的设计 -DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!
Platform: | Size: 1588224 | Author: myfingerhurt | Hits:

[Software Engineering] 813S02-Team8

Description: its bit the system on chip designed in verilog
Platform: | Size: 611328 | Author: bravehearts | Hits:

[SCM] upload_code

Description: 每个代码见压缩包内文件名，分别为使用单片机控制AD9627的代码，已在硬件电路实现；基于FPGA的DDR SDRAM控制源代码，将文件夹内文件加入同一工程即可；以及三份FPGA内部学习资料。 C代码开发环境为KeilC，verilog代码开发环境为Quartus。 -See each code within the compressed package file name, respectively, for the use of the AD9627 single-chip control of code, has been in the hardware circuit FPGA-based DDR SDRAM control source code, will be adding a document folder to the same project and three FPGA internal learning materials. C code development environment for KeilC, verilog code development environment for the Quartus.
Platform: | Size: 1746944 | Author: 姜琰俊 | Hits:

[VHDL-FPGA-Verilog] SPI_IIC_design_example

Description: ALTERA原厂提供的例程，网上很难找到的，在MAX2系列芯片上实现过，VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
Platform: | Size: 394240 | Author: 郑康山 | Hits:

[VHDL-FPGA-Verilog] HD_6409_file

Description: HD6409 编解码的fpga实现。 本例采用alter的芯片 ，成功实现HD6409的功能。 -HD6409 codec to achieve the fpga. In this case ，i use the the chip of alter , the verilog functions can implementate the function of HD6409.
Platform: | Size: 579584 | Author: fu | Hits:

[MiddleWare] key_scan1

Description: 用verilog语言描述的键盘扫描程序，用于FPGA芯片以及矩阵键盘的测试。-With verilog language keypad scanning procedure.For the FPGA chip and matrix of the keyboard.
Platform: | Size: 199680 | Author: 张启梅 | Hits:

[VHDL-FPGA-Verilog] DHT22

Description: 这个是用Quartus II软件写的Verilog HDL语言写的与温湿度传感器DHT2x通信的代码. 里面有详细的注解. 主要用于DHT2x单线总线通信转换为8位并行总线通信,应用于具有外部8位总线访问功能的单片机直接读取温湿度数据. 此程序在EPM7128SLC-10中成功测试.-The Quartus II software is written in the Verilog HDL language and communication of temperature and humidity sensors DHT2x code. There are detailed notes. DHT2x mainly for one-way bus communication is converted to 8-bit parallel bus communications, applied to the external 8 bit bus single-chip direct access to read the temperature and humidity data. This program successfully EPM7128SLC-10 test.
Platform: | Size: 1283072 | Author: yuantielei | Hits:

[Embeded-SCM Develop] E_8051_FTEST_K4X4_new

Description: 是带５１单片机核的等精度频率计的ＦＰＧＡ设计的部分。用ＶＨＤＬ编的，也有ＶＥＲＩＬＯＧ的。-51 is a single chip with precision, such as the nucleus of the frequency of some of FPGA design. VHDL for use as well as the VERILOG.
Platform: | Size: 5454848 | Author: 李逵 | Hits:

[VHDL-FPGA-Verilog] dacconf

Description: 通信中常用的AD9857芯片的FPGA配置源码VERILOG实现-Communications commonly used in the AD9857 chip FPGA realization of VERILOG source configuration
Platform: | Size: 2048 | Author: 王王 | Hits:

[Other] AD9851_VERILOG

Description: 一个DDS芯片AD9851的VERILOG程序，加74HC574锁存器！-A DDS chip AD9851' s VERILOG program, plus 74HC574 latch!
Platform: | Size: 1024 | Author: 陈枫 | Hits:

[source in ebook] sanfenpin

Description: verilog 三分频 分频器是FPGA设计中使用频率非常高的基本设计之一，尽管在目前大部分设计中，广泛使用芯片厂家集成的锁相环资源，如altera 的PLL，Xilinx的DLL.来进行时钟的分频，倍频以及相移。-verilog-third of the frequency divider is a FPGA design, very high frequency of use, one of the basic design, although most of the designs in the current widespread use of factory-integrated PLL chip resources, such as altera of the PLL, Xilinx' s DLL. to for the sub-clock frequency multiplier and phase shift.
Platform: | Size: 1024 | Author: 杨化冰 | Hits:

[VHDL-FPGA-Verilog] chuzhuchejifeiqi

Description: 利用FPGA芯片控制出租车计费系统，采用Verilog HDL编写，程序简介-Control the use of FPGA chip Taxi billing system, using Verilog HDL preparation, procedures for
Platform: | Size: 7162880 | Author: 王磊 | Hits:

[Embeded-SCM Develop] NIOS_NET_demo

Description: 在nios系统开发中的网卡芯片驱动的代码,包括verilog代码,与相应的驱动代码-In the nios system development in the card chip-driven code, including the verilog code, and the corresponding driver code
Platform: | Size: 1774592 | Author: chd | Hits:

[VHDL-FPGA-Verilog] ADC124

Description: 采用verilog编写的高速串型AD采集芯片adc124驱动代码，占用le较少，效率高，目前我应用在较多产品上-Verilog prepared using high-speed string-type AD Acquisition chip adc124 driver code, occupation le small, high efficiency, the current I applied to more products
Platform: | Size: 1024 | Author: chenwl | Hits:
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